Broadcom is seeking an experienced package mechanical FEA engineer for very-large and complex packages for industry-leading ASICs. You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. You'll have exposure to emerging package integration technologies, such as co-packaged fiber-optic transceivers and connectors and complex chip stacking (3DIC, hybrid copper bonding, heterogeneous integration, etc). Also, you will develop and optimize unique multi-chip-module (MCM) packages and mainstream flip-chip BGA (FCBGA) packages. You'll have the opportunity to collaborate with the R&D and manufacturing teams to influence the mechanical design of new ASICs, and make engineering trade offs with warpage, stress, reliability, cost, thermal and electrical performance, etc..
The annual base salary range for this position is $127,100 - $203,400.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
R024441
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